. | Rampage III Extreme - Bios 1005 | Stock | X.M.P - Info | 24/7 Goal | 24/7 No LLC | ||
. | Target CPU Frequency | 3325 MHz | 3861 | 4200 MHz | 4200 MHz | ||
. | Target DRAM Frequency | 1333 MHz | 2006 Mhz | 2005 MHz | 2005 MHz | ||
. | |||||||
. | LN2 Mode*** | Disabled | Disabled | Disabled | Disabled | ||
. | QPI Loadline Calibration*** | Disabled | Disabled | Disabled | Disabled | ||
. | |||||||
. | Sync Mode | Enabled | Enabled | Enabled | Enabled | ||
. | AI Overclock Tuner | Manual | X.M.P. | Manual | Manual | ||
. | OC From CPU level Up | Auto | Auto | Auto | Auto | ||
. | |||||||
. | 2D Performance Booster | Disabled | Disabled | Disabled | Disabled | ||
. | CPU Ratio Setting | Auto | 27 | 21 | 21 | ||
. | CPU Turbo Power Limit | Disabled | Disabled | Disabled | Disabled | ||
. | |||||||
. | >CPU Configuration-- | i7-980x Batch# 3005F729 | |||||
. | CPU Ratio Setting | Auto | 27 | 21 | 21 | ||
. | C1E Support | Enabled | Enabled | Enabled | Enabled | ||
. | Hardware Prefetcher | Enabled | Enabled | Enabled | Enabled | ||
. | Adjacent Cache Line Prefetcher | Enabled | Enabled | Enabled | Enabled | ||
. | MPS and ACPI MADT ordering | Modern | Modern | Modern | Modern | ||
. | Intel(R) Virtualiyation Tech | Enabled | Enabled | Enabled | Enabled | ||
. | CPU TM Function | Enabled | Enabled | Enabled | Enabled | ||
. | Execute Disable Bit | Enabled | Enabled | Enabled | Enabled | ||
. | Intel(R) HT Technology | Enabled | Enabled | Enabled | Enabled | ||
. | Active Processor Cores | All | All | All | All | ||
. | A20M | Disabled | Disabled | Disabled | Disabled | ||
. | Intel(R) SpeedStep(TM) Tech | Enabled | Enabled | Disabled | Disabled | ||
. | IntelĀ® Turbo Mode Tech | Enabled | Enabled | N/A | N/A | ||
. | Performance/Watt select | Traditional | Traditional | Power Enhanced | Power Enhanced | ||
. | Intel(R) C-STATE Tech | Disabled | Disabled | Enabled | Enabled | ||
. | C State package limit setting | Auto | Auto | ||||
. | C1 Auto Demotion | Enabled | Enabled | ||||
. | C3 Auto Demotion | Enabled | Enabled | ||||
. | |||||||
. | BCLK Frequency | 133 | 143 | 200 | 200 | ||
. | PCIE Frequency | 100 | 100 | 100 | 100 | ||
. | DRAM Frequency | Auto | DDR3-2006 MHz | DDR3-2005 MHz | DDR3-2005 MHz | ||
. | UCLK Frequency (Uncore = 1.5 x DRAM) | Auto | Auto | 3007 MHz | 3007 MHz | ||
. | QPI Link Data Rate | Auto | Auto | 3608.5 MHz | 3608.5 MHz | ||
. | |||||||
. | Memory Configuration Protect | Disabled | Disabled | Disabled | Disabled | ||
. | |||||||
. | >DRAM Timing Control--- | G.Skill Trident F3-16000CL8T-12GBTDD | |||||
. | CAS# Latency | Auto - 9 | 8 | 8 | 8 | ||
. | RAS# to CAS# Delay | Auto - 9 | 9 | 9 | 9 | ||
. | RAS# PRE Time | Auto - 9 | 8 | 8 | 8 | ||
. | RAS# ACT Time | Auto - 24 | 24 | 24 | 24 | ||
. | RAS# to RAS# Delay | Auto - 4 | Auto - 4 | Auto - 4 | Auto - 4 | ||
. | REF Cycle Time | Auto - 107 | Auto - 107 | Auto - 107 | Auto - 107 | ||
. | WRITE Recovery Time | Auto - 10 | Auto - 10 | Auto - 10 | Auto - 10 | ||
. | READ to PRE Time | Auto - 7 | 7 | 7 | 7 | ||
. | FOUR ACT WIN Time | Auto - 20 | Auto - 20 | Auto - 20 | Auto - 20 | ||
. | Back-To-BackCAS# Delay | Auto - 0 | Auto - 0 | Auto - 0 | Auto - 0 | ||
. | |||||||
. | Timing Mode | Auto - 1N | 2N | 2N | 2N | ||
. | Round Trip Latency on CHA | Auto - 62 | Auto - 62 | Auto - 62 | Auto - 62 | ||
. | Round Trip Latency on CHB | Auto - 63 | Auto - 63 | Auto - 63 | Auto - 63 | ||
. | Round Trip Latency on CHC | Auto - 63 | Auto - 63 | Auto - 63 | Auto - 63 | ||
. | |||||||
. | WRITE To READ Delay(DD) | Auto - 5 | Auto - 5 | Auto - 5 | Auto - 5 | ||
. | WRITE To READ Delay(DR) | Auto - 5 | Auto - 5 | Auto - 5 | Auto - 5 | ||
. | WRITE To READ Delay(SR) | Auto - 16 | Auto - 16 | Auto - 16 | Auto - 16 | ||
. | READ To WRITE Delay(DD) | Auto - 10 | Auto - 10 | Auto - 10 | Auto - 10 | ||
. | READ To WRITE Delay(DR) | Auto - 10 | Auto - 10 | Auto - 10 | Auto - 10 | ||
. | READ To WRITE Delay(SR) | Auto - 11 | Auto - 11 | Auto - 11 | Auto - 11 | ||
. | READ To READ Delay(DD) | Auto - 7 | Auto - 7 | Auto - 7 | Auto - 7 | ||
. | READ To READ Delay(DR) | Auto - 6 | Auto - 6 | Auto - 6 | Auto - 6 | ||
. | READ To READ Delay(SR) | Auto - 4 | Auto - 4 | Auto - 4 | Auto - 4 | ||
. | WRITE To WRITE Delay(DD) | Auto - 7 | Auto - 7 | Auto - 7 | Auto - 7 | ||
. | WRITE To WRITE Delay(DR) | Auto - 7 | Auto - 7 | Auto - 7 | Auto - 7 | ||
. | WRITE To WRITE Delay(SR) | Auto - 4 | Auto - 4 | Auto - 4 | Auto - 4 | ||
. | |||||||
. | CPU Differential Amplitude | Auto | Auto | Auto | Auto | ||
. | CPU Clock Skew | Auto | Auto | Auto | Auto | ||
. | IOH Clock Skew | Auto | Auto | Auto | Auto | ||
. | |||||||
. | ------------ Extreme Engine Digi+ ------------ | ||||||
. | Digi+ PWR Mode | T-Balanced | T-Balanced | T-Balanced | T-Balanced | ||
. | PWR Volt. Control | Auto | Auto | Auto | Auto | ||
. | Load-Line Calibration | Auto | Auto | Auto | 0% | ||
. | CPU Voltege OCP | Enabled | Enabled | Enabled | Enabled | ||
. | CPU PWM Frequency | Auto | Auto | Auto | Auto | ||
. | |||||||
. | Extreme OV | Disabled | Disabled | Disabled | Disabled | ||
. | Extreme OC | Auto | Auto | Auto | Auto | ||
. | |||||||
. | CPU Voltage (vCore) | Auto - 1.105 | Auto - 1.105 | 1.275 | 1.38125 | ||
. | CPU PLL Voltage | Auto - 1.812 | Auto - 1.812 | Auto - 1.812 | Auto - 1.812 | ||
. | QPI/DRAM Core Voltage | Auto - 1.204 | 1.4 | 1.4 | 1.4 | ||
. | DRAM Bus Voltage | Auto - 1.601 | 1.65625 | 1.65625 | 1.65625 | ||
. | |||||||
. | >DRAM REF Voltages---------------------------- | ||||||
. | DRAM DATA REF Voltage on CHA | Auto | Auto | Auto | Auto | ||
. | DRAM CTRL REF Voltage on CHA | Auto | Auto | Auto | Auto | ||
. | DRAM DATA REF Voltage on CHB | Auto | Auto | Auto | Auto | ||
. | DRAM CTRL REF Voltage on CHB | Auto | Auto | Auto | Auto | ||
. | DRAM DATA REF Voltage on CHC | Auto | Auto | Auto | Auto | ||
. | DRAM CTRL REF Voltage on CHC | Auto | Auto | Auto | Auto | ||
. | ---------------------------------------------- | ||||||
. | |||||||
. | IOH Voltage | Auto - 1.111 | Auto - 1.111 | Auto - 1.111 | Auto - 1.111 | ||
. | IOH PCIE Voltage | Auto - 1.508 | Auto - 1.508 | Auto - 1.508 | Auto - 1.508 | ||
. | ICH Voltage | Auto - 1.111 | Auto - 1.111 | Auto - 1.111 | Auto - 1.111 | ||
. | ICH PCIE Voltage | Auto | Auto | Auto | Auto | ||
. | |||||||
. | ---------- Spread Spectrum Control ----------- | ||||||
. | CPU Spread Spectrum | Auto | Auto | Auto | Auto | ||
. | DRAM Spread Spectrum | Auto | Auto | Auto | Auto |